FPGA engineer with 7 years designing high-speed digital logic for radar and communications hardware. Closed timing on a 16-channel beamforming design at 491 MHz on a Xilinx UltraScale+ device, enabling a product launch two months early. Strong in SystemVerilog, UVM verification and bring-up in the lab.
Experience
Senior FPGA Engineer, Ridgeback Signal Systems (Huntsville, AL)
Sep 2022 – Present
Architected a 16-channel digital beamformer in SystemVerilog on a Zynq UltraScale+ RFSoC, closing timing at 491 MHz with 18% LUT headroom
Built a UVM testbench with constrained-random stimulus and functional coverage, reaching 97% coverage before tape-out of the board
Led lab bring-up with ChipScope ILAs and oscilloscopes, resolving JESD204B link issues in 3 weeks
Mentor 2 junior engineers through code reviews and CDC analysis
FPGA Design Engineer, Bayfront Communications Hardware (San Diego, CA)
Jun 2019 – Aug 2022
Implemented DDC, FIR filters and FFT cores in VHDL for a software-defined radio, cutting resource use 21% versus vendor IP
Wrote Python and cocotb regression tests run nightly in Jenkins
Education
B.S. Electrical Engineering, Georgia Institute of Technology (Aug 2015 – May 2019)
A strong FPGA Engineer resume shows the systems you built, the scale they run at, and the measurable effect on speed, reliability or cost. Put your most relevant recent role first and make every bullet show a result, not a duty.
Sections, in order
Summary
Experience
Projects
Skills
Education
Length: One page for most candidates; move to two only if every line is relevant.
Summary: Write two or three lines: your role, your strongest skills, and one result that proves them.
Skills to feature
Programming languages
System design
Cloud platforms (AWS, GCP, Azure)
CI/CD
Testing and code review
Databases and SQL
Observability
Security fundamentals
APIs and integrations
Technical documentation
Example bullet points
Rebuilt the checkout service in Go, cutting p95 latency from 900 ms to 180 ms for 2M monthly users
Introduced contract tests and staged rollouts, reducing production incidents by 45% in two quarters
Migrated 30 services to Kubernetes with Terraform, lowering cloud spend by $250k a year
Tips from recruiters
Group skills by category (for example "Languages: Go, TypeScript") so recruiters and ATS parsers find them quickly.
Link to a repository, demo or write-up for at least one project you can talk about in depth.
Name the stack inside each bullet; keyword matching happens at the bullet level, not only in the skills list.
Recommended templates
Classic (ATS-friendly): Jake's-style LaTeX classic: small caps and hairline rules
Tech (ATS-friendly): Developer style: mono headings and tags, sans body
Modern (ATS-friendly): Clean single column with accent headings and rules
FPGA Engineer resume FAQ
What should a FPGA Engineer resume include?
A FPGA Engineer resume should show the systems you built, the scale they run at, and the measurable effect on speed, reliability or cost. Use these sections in this order: Summary, Experience, Projects, Skills and Education. Put your most relevant recent role first and make every bullet show a result, not a duty.
What is the best resume template for a FPGA Engineer?
Classic, Tech and Modern work well for FPGA Engineer roles. They are single-column with standard headings, so applicant tracking systems (ATS) parse them reliably.
How long should a FPGA Engineer resume be?
One page for most candidates; move to two only if every line is relevant.
Which skills should a FPGA Engineer put on a resume?
Prioritize the skills named in the job posting. Common ones for FPGA Engineer roles are Programming languages, System design, Cloud platforms (AWS, GCP, Azure), CI/CD, Testing and code review and Databases and SQL.
How do I write strong FPGA Engineer resume bullet points?
Start with an action verb, say what you did, and end with a measurable result such as latency, uptime and deploy frequency. For example: "Rebuilt the checkout service in Go, cutting p95 latency from 900 ms to 180 ms for 2M monthly users."